Example for AT91SAM7S — functions init_xxx()

AT91SAM7S256 — инициализация.

Пример инициализации для AT91SAM7S256

Это наверно один из самых важных файлов для запуска микроконтроллера. Инициализация нужна для настройки переферии микроконтроллера перед осуществлением работы с ней.

Взято с какогото одного моего старого проекта на этом микроконтроллере и подрихрованно.

 

#include "at91sam7s64.h"
#include "init.h"
#include "interrupt.h"
#include "sched.h"
#include "usart.h"
#include "delays.h"
#include "mmc.h"

/******************************************/
void init_SYS(void){
    //Watchdog Enable
    AT91C_BASE_WDTC->WDTC_WDMR= ~AT91C_WDTC_WDDIS;
}
/******************************************/
void init_PIOA(void){
    AT91PS_SYS regs = AT91C_BASE_SYS;
    unsigned int data;
/* Init I/O Lines
---------------------------------------------------------------
    P N Discription of connect to pins
---------------------------------------------------------------
    0 48 led0 lcd_d0
    1 47 led1 lcd_d1
    2 44 led2 lcd_d2
    3 43  lcd_d3
    4 36  lcd_d4
    5 35  lcd_d5
    6 34  lcd_d6
    7 32  lcd_d7
................................
    8 31 
    9 30 DRXD
    10 29 DTXD
    11 28
    12 27
    13 22
    14 21
    15 20  lcd_E
................................
    16 19 k0
    17 9 k1
    18 10 k2
    19 13 k3
    20 16  lcd_RS
    21 11
    22 14
    23 15
................................
    24 23
    25 25
    26 26
    27 37
    28 38
    29 41
    30 42
    31 52
---------------------------------------------------------------
 32bits - 0x15ABCDEF - 0001 0101 1010 1011 1100 1101 1110 1111
 HEX                      1    5    A    B    C    D    E    F
-------------------------------------------------------------------------------------------*/
/* PIO enable */    data=0xa01F80ff; regs->PIOA_PER  =data; regs->PIOA_PDR  =~data; // pck
/* Output Enable */ data=0xa01080ff; regs->PIOA_OER  =data; regs->PIOA_ODR  =~data;
/* Glitch */     data=0x000F0000; regs->PIOA_IFER =data; regs->PIOA_IFDR =~data;
   data=0xa0000000; regs->PIOA_SODR =data; regs->PIOA_CODR = data;
   data=0x00000000; regs->PIOA_IER  =data; regs->PIOA_IDR  =~data;
   data=0x00000000; regs->PIOA_MDER =data; regs->PIOA_MDDR =~data;
/* Pull-up  */     data=0xa01080ff;    regs->PIOA_PPUER=data; regs->PIOA_PPUDR=~data; // pck
//          data=0x00000000; regs->PIOA_ASR  =data; regs->PIOA_BSR  =~data;
/* Out stat wr en*/ data=0xa01080ff; regs->PIOA_OWER =data; regs->PIOA_OWDR =~data; // pck
/*-------------------------------------------------------------------------------------------*/
}
/******************************************/
void init_TMR(void){
    unsigned int data;
    AT91PS_SYS regs = AT91C_BASE_SYS;
/* Load PIV and enable PIT with its interrupt */
//    initSched();
// data = 0x0300000b; /* 10 us @ 100kHz@ 18.432 MHz */
// data = 0x03000072; /* 100 us @ 10kHz @ 18.432 MHz */
// data = 0x0300047d; /* 1 ms @ 1kHz @ 18.432 MHz */
// data = 0x03002c00; /* 10 ms @ 100Hz @ 18.432 MHz */
 data = 0x03005900; /* 20 ms @ 50Hz @ 18.432 MHz */
// data = 0x0301c000; /* 100 ms @ 10Hz @ 18.432 MHz */
// data = 0x0303F480; /* 200 ms @ 5Hz @ 18.432 MHz */
 regs->PITC_PIMR = data;
}
/******************************************/
void init_AIC(void){
    AT91PS_SYS regs = AT91C_BASE_SYS;

/* Init AIC */
    regs->AIC_SPU = (unsigned int)spuriousInterrupt; /* Init spurious interrupt handler */
/* Load VECTOR */ 
    regs->AIC_SVR[1] = (unsigned int)isrSYS;
/* Init SMR1 - system controller interrupt */
    regs->AIC_SMR[1] = 3; /* Priority = 3 */ /*0-low 7-higt*/
/* SMR  0 H sensitive ->L sensitive  2 Pos trig -> Neg trig
  4 H sensitive ->H sensitive  6 Pos trig -> Pos trig  */
/* Enable system controller's interrupt */
    regs->AIC_IECR |= 2;
    regs->AIC_IDCR &= ~2;
    regs->AIC_SVR[7] = (unsigned int)isrUSART1;
    regs->AIC_SMR[7] = 5;
    regs->AIC_IECR |= 128;
    regs->AIC_IDCR &= ~128;
}
/******************************************/
void init_PMC(void){
    unsigned int data;
    AT91PS_SYS regs = AT91C_BASE_SYS;

// PMC
    data=0x00000001; regs->PMC_MCKR  =data; 
//    while(regs->PMC_SR & AT91C_PMC_MCKRDY);
    data=0x00000401; regs->PMC_SCER |=data; regs->PMC_SCDR  &=~data;
    data=0x801f80ff; regs->PMC_PCER |=data; regs->PMC_PCDR  &=~data; // pck
    data=0x0000ff01; regs->PMC_MOR =data;
    data=0x00007f01; regs->PMC_PLLR =data;
/*    data=0x0000040d; regs->PMC_IER =data;  regs->PMC_IDR  =~data;
    data=0x0000040d; regs->PMC_IMR =data;*/
}
/******************************************/
void init_show(void) {
 AT91PS_SYS regs = AT91C_BASE_SYS;
 unsigned int xxx=0;

 while(xxx<6){
    delay();
     switch (xxx){
      case 0: regs->PIOA_ODSR = ~0x1; break;
      case 1: regs->PIOA_ODSR = ~0x2; break;
      case 2: regs->PIOA_ODSR = ~0x4; break;
      case 3: regs->PIOA_ODSR = ~0x4; break;
      case 4: regs->PIOA_ODSR = ~0x2; break;
      case 5: regs->PIOA_ODSR = ~0x1; break;
     } xxx++;
 }
}
/*********************************************/
// setup usart1 in spi mode
void init_SPI (void){
// AT91PS_SYS regs = AT91C_BASE_SYS;
AT91PS_SPI s_pSpi = AT91C_BASE_SPI;
AT91PS_PIO s_pPio = AT91C_BASE_PIOA;
AT91PS_PMC s_pPMC = AT91C_BASE_PMC;
AT91PS_PDC s_pPDC = AT91C_BASE_PDC_SPI;
//AT91PS_SYS s_pSys = AT91C_BASE_SYS;

  //set functionalite to pins:
  //port0.11 -> NPCS0
  //port0.12 -> MISO
  //port0.13 -> MOSI
  //port0.14 -> SPCK
  s_pPio->PIO_PDR = BIT11 | BIT12 | BIT13 | BIT14;
  s_pPio->PIO_ASR = BIT11 | BIT12 | BIT13 | BIT14;
  s_pPio->PIO_BSR = 0;

  s_pPMC->PMC_PCER = 1 << AT91C_ID_SPI;

  //  Fixed mode
  s_pSpi->SPI_CR      = 0x01;              //SPI Enable

  s_pSpi->SPI_MR      = 0xE0011;  //Master mode, fixed select, disable decoder, FDIV=0 (MCK), PCS=1110
  //s_pSpi->SPI_CSR[0]  = 0x4A02;   //8bit, CPOL=0, ClockPhase=1, SCLK = 200kHz
//  s_pSpi->SPI_CSR[0]  = 0x1002;   //8bit, CPOL=0, ClockPhase=1, SCLK = 1200kHz
  s_pSpi->SPI_CSR[0]  = 0x0402;   //8bit, CPOL=0, ClockPhase=1, SCLK >>= 1200kHz

  s_pPDC->PDC_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN;
  s_pSpi->SPI_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN;

//    PullUp R to SPI
//    regs->PIOA_PPUER |= (_B11 | _B12 | _B13 | _B14);
//    regs->PIOA_PPUDR &= ~(_B11 | _B12 | _B13 | _B14);
}
/*********************************************/

PS: Со временем этот пост обновится…

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